<?xml version="1.0" encoding="UTF-8"?><rss xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:atom="http://www.w3.org/2005/Atom" version="2.0"><channel><title><![CDATA[I2C with Atom S3 and PoE Base W5500]]></title><description><![CDATA[<p dir="auto">Hi, I'm interested in an M5 Atom S3 in combination with an ATOMIC PoE Base W5500. If I combine these two devices, would I still be able to access the I2C bus?</p>
<p dir="auto">Thank you.</p>
]]></description><link>https://community.m5stack.com/topic/6221/i2c-with-atom-s3-and-poe-base-w5500</link><generator>RSS for Node</generator><lastBuildDate>Tue, 28 Apr 2026 23:52:15 GMT</lastBuildDate><atom:link href="https://community.m5stack.com/topic/6221.rss" rel="self" type="application/rss+xml"/><pubDate>Sun, 17 Mar 2024 10:45:52 GMT</pubDate><ttl>60</ttl><item><title><![CDATA[Reply to I2C with Atom S3 and PoE Base W5500 on Mon, 18 Mar 2024 16:04:23 GMT]]></title><description><![CDATA[<p dir="auto"><a class="plugin-mentions-user plugin-mentions-a" href="/user/gerber" aria-label="Profile: gerber">@<bdi>gerber</bdi></a> said in <a href="/post/24413">I2C with Atom S3 and PoE Base W5500</a>:</p>
<blockquote>
<p dir="auto">ATOMIC PoE Base W5500</p>
</blockquote>
<p dir="auto">ATOMIC PoE Base W5500 occupies PIN ports and uses SPI protocol from what I can see,<br />
<img src="/assets/uploads/files/1710777816277-atom-poe-resized.jpg" alt="0_1710777815248_atom poe.jpg" class=" img-fluid img-markdown" /></p>
<p dir="auto">so groove port on atom light is still available (TypeC x 1, GROVE(I2C+I/0+UART) x 1)</p>
<p dir="auto"><img src="/assets/uploads/files/1710777834249-atom-light-resized.jpg" alt="0_1710777833488_atom light.jpg" class=" img-fluid img-markdown" /></p>
]]></description><link>https://community.m5stack.com/post/24430</link><guid isPermaLink="true">https://community.m5stack.com/post/24430</guid><dc:creator><![CDATA[robski]]></dc:creator><pubDate>Mon, 18 Mar 2024 16:04:23 GMT</pubDate></item></channel></rss>