<?xml version="1.0" encoding="UTF-8"?><rss xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:atom="http://www.w3.org/2005/Atom" version="2.0"><channel><title><![CDATA[Port.C of boot serial console is IO inverted on CoreMP135.]]></title><description><![CDATA[<p dir="auto">The boot serial console can be accessed from Grove Port.C on the CoreMP135, via USB serial.<br />
U-Boot logs are output from Port.C pin 1 (non TX-RX swap signal), while the Linux console is output from Port.C pin 2 (with TX-RX swap signal).<br />
I would like to see the U-Boot logs and Linux console aligned on the same IO.</p>
<p dir="auto"><img src="/assets/uploads/files/1718724268060-bcb16fb6-0ab8-40fc-ad98-f6dd5a25c096-image.png" alt="bcb16fb6-0ab8-40fc-ad98-f6dd5a25c096-image.png" class=" img-fluid img-markdown" /></p>
<ul>
<li>U-Boot logs<br />
from Port.C non TX-RX swap signal</li>
</ul>
<pre><code>NOTICE:  CPU: STM32MP135D Rev.Y
NOTICE:  Model: STMicroelectronics STM32MP135F-DK Discovery Board
NOTICE:  BL2: v2.6-stm32mp1-r1.0(release):2021.05-10169-gb885d5525a
NOTICE:  BL2: Built : 15:39:25, May 15 2024
NOTICE:  BL2: Booting BL32
optee optee: OP-TEE: revision 3.16 (b885d552)

U-Boot 2021.10-stm32mp-r1 (May 15 2024 - 15:39:22 +0800)

CPU: STM32MP135D Rev.?
Model: STMicroelectronics STM32MP135F-DK Discovery Board
Board: stm32mp1 in trusted mode (st,stm32mp135f-dk)
DRAM:  512 MiB
optee optee: OP-TEE: revision 3.16 (b885d552)
Clocks:
- MPU : 650 MHz
- AXI : 266.500 MHz
- PER : 24 MHz
- DDR : 533 MHz
WDT:   Started with servicing (32s timeout)
NAND:  0 MiB
MMC:   STM32 SD/MMC: 0
Loading Environment from MMC... OK
In:    serial
Out:   serial
Err:   serial
invalid MAC address 0 in OTP 00:00:00:00:00:00
Net:   No ethernet found.
Hit any key to stop autoboot:  0
Boot over mmc0!
switch to partitions #0, OK
mmc0 is current device
Scanning mmc 0:5...
Found /boot/extlinux/extlinux.conf
Retrieving file: /boot/extlinux/extlinux.conf
160 bytes read in 20 ms (7.8 KiB/s)
1:      stm32mp135f-coremp135-buildroot
Retrieving file: /boot/zImage
7923832 bytes read in 579 ms (13.1 MiB/s)
append: root=/dev/mmcblk0p5 rw panic=5 quiet rootwait
Retrieving file: /boot/stm32mp135f-coremp135.dtb
68116 bytes read in 24 ms (2.7 MiB/s)
Kernel image @ 0xc2000000 [ 0x000000 - 0x78e878 ]
## Flattened Device Tree blob at c4000000
   Booting using the fdt blob at 0xc4000000
   Loading Device Tree to cffec000, end cffffa13 ... OK
gc2145@3c node not found - DT update aborted
FDT: cryp@54002000 node disabled for STM32MP135D Rev.?

Starting kernel ...
</code></pre>
<ul>
<li>Linux logs<br />
from Port.C  with TX-RX swap signal</li>
</ul>
<pre><code>[    0.004005] /cpus/cpu@0 missing clock-frequency property
[    0.435138] stm32-cpufreq stm32-cpufreq: OPP-v2 not supported
Starting syslogd: OK
Starting klogd: OK
Starting modules: soundcore success, snd success, snd_timer success, snd_pcm success, snd_pcm_dmaengine success, snd_soc_core success, snd_soc_simple_card_utils success, snd_soc_audio_graph_card success, snd-soc-simple-card success, snd_soc_stm32_sai success, snd_soc_stm32_sai_sub success, cdc-acm success, libcomposite success, g_serial success, OK
Running sysctl: OK
Starting mdev... OK
Seeding 256 bits and crediting
Saving 256 bits of creditable seed for next boot
Starting tee-supplicant: Using device /dev/teepriv0.
OK
Starting network: OK
Starting dhcpcd...
dhcpcd-9.4.1 starting
DUID 00:01:00:01:2d:f9:ec:09:2a:88:82:9b:b0:f0
forked to background, child pid 177
[    5.966541] m_can_platform 4400e000.can can0: bit-timing not yet defined
[    5.974064] m_can_platform 4400e000.can can0: failed to open can device
[    5.988759] m_can_platform 4400f000.can can1: bit-timing not yet defined
[    5.994164] m_can_platform 4400f000.can can1: failed to open can device
Starting dropbear sshd: OK
Stopping /etc/rc.localOK

#     #  #######   #####   #######     #      #####   #    #
##   ##  #        #     #     #       # #    #     #  #   #
# # # #  #        #           #      #   #   #        #  #
#  #  #  ######    #####      #     #     #  #        ###
#     #        #        #     #     #######  #        #  #
#     #  #     #  #     #     #     #     #  #     #  #   #
#     #   #####    #####      #     #     #   #####   #    #
Welcome to CoreMP135, Powered by M5Stack.
CoreMP135 login:
</code></pre>
<h2>Reference</h2>
<p dir="auto"><a href="https://x.com/ciniml/status/1791303454474014932" target="_blank" rel="noopener noreferrer nofollow ugc">https://x.com/ciniml/status/1791303454474014932</a></p>
]]></description><link>https://community.m5stack.com/topic/6563/port-c-of-boot-serial-console-is-io-inverted-on-coremp135</link><generator>RSS for Node</generator><lastBuildDate>Wed, 29 Apr 2026 01:49:41 GMT</lastBuildDate><atom:link href="https://community.m5stack.com/topic/6563.rss" rel="self" type="application/rss+xml"/><pubDate>Tue, 18 Jun 2024 15:42:38 GMT</pubDate><ttl>60</ttl><item><title><![CDATA[Reply to Port.C of boot serial console is IO inverted on CoreMP135. on Sun, 23 Jun 2024 13:20:01 GMT]]></title><description><![CDATA[<p dir="auto">This discussion will be continued below<br />
<a href="https://github.com/m5stack/CoreMP135_buildroot-external-st/issues/2" target="_blank" rel="noopener noreferrer nofollow ugc">https://github.com/m5stack/CoreMP135_buildroot-external-st/issues/2</a></p>
]]></description><link>https://community.m5stack.com/post/25658</link><guid isPermaLink="true">https://community.m5stack.com/post/25658</guid><dc:creator><![CDATA[nnn]]></dc:creator><pubDate>Sun, 23 Jun 2024 13:20:01 GMT</pubDate></item><item><title><![CDATA[Reply to Port.C of boot serial console is IO inverted on CoreMP135. on Wed, 19 Jun 2024 05:04:13 GMT]]></title><description><![CDATA[<p dir="auto"><a class="plugin-mentions-user plugin-mentions-a" href="/user/nnn" aria-label="Profile: nnn">@<bdi>nnn</bdi></a> Yes its set at startup by the device tree overlay file.<br />
I finally managed to find the config in the linux DTS file last night.<br />
In order to redefine it you need to create a new Device Tree config to redefine the pins and functions.</p>
]]></description><link>https://community.m5stack.com/post/25608</link><guid isPermaLink="true">https://community.m5stack.com/post/25608</guid><dc:creator><![CDATA[ajb2k3]]></dc:creator><pubDate>Wed, 19 Jun 2024 05:04:13 GMT</pubDate></item><item><title><![CDATA[Reply to Port.C of boot serial console is IO inverted on CoreMP135. on Tue, 18 Jun 2024 23:51:12 GMT]]></title><description><![CDATA[<p dir="auto"><a class="plugin-mentions-user plugin-mentions-a" href="/user/nnn" aria-label="Profile: nnn">@<bdi>nnn</bdi></a></p>
<p dir="auto">According to the data sheet, is the IO of UART6 fixed at startup?</p>
<p dir="auto"><img src="/assets/uploads/files/1718754535962-bc7e5c43-70e1-45aa-9d6e-252fc8ca2ee4-image.png" alt="bc7e5c43-70e1-45aa-9d6e-252fc8ca2ee4-image.png" class=" img-fluid img-markdown" /></p>
<p dir="auto">Reference：<br />
<a href="https://www.st.com/ja/microcontrollers-microprocessors/stm32mp135d.html" target="_blank" rel="noopener noreferrer nofollow ugc">https://www.st.com/ja/microcontrollers-microprocessors/stm32mp135d.html</a></p>
<p dir="auto"><a href="https://x.com/ciniml/status/1803093984778277271" target="_blank" rel="noopener noreferrer nofollow ugc">https://x.com/ciniml/status/1803093984778277271</a></p>
]]></description><link>https://community.m5stack.com/post/25606</link><guid isPermaLink="true">https://community.m5stack.com/post/25606</guid><dc:creator><![CDATA[nnn]]></dc:creator><pubDate>Tue, 18 Jun 2024 23:51:12 GMT</pubDate></item><item><title><![CDATA[Reply to Port.C of boot serial console is IO inverted on CoreMP135. on Tue, 18 Jun 2024 23:30:51 GMT]]></title><description><![CDATA[<p dir="auto"><a class="plugin-mentions-user plugin-mentions-a" href="/user/nnn" aria-label="Profile: nnn">@<bdi>nnn</bdi></a></p>
<p dir="auto">The uart6 in linux-dts was able to switch IO with rx-tx-swap.<br />
The uart6 in uboot-dts seems to be fixed, unable to switch IO with rx-tx-swap.<br />
Is there a HW issue with the Stm32MP135?</p>
<p dir="auto"><img src="/assets/uploads/files/1718753321787-32d4b3e2-cf12-47ff-825b-5ce679012cea-image.png" alt="32d4b3e2-cf12-47ff-825b-5ce679012cea-image.png" class=" img-fluid img-markdown" /></p>
]]></description><link>https://community.m5stack.com/post/25605</link><guid isPermaLink="true">https://community.m5stack.com/post/25605</guid><dc:creator><![CDATA[nnn]]></dc:creator><pubDate>Tue, 18 Jun 2024 23:30:51 GMT</pubDate></item></channel></rss>